1. Field of the Invention
The present invention relates to a semiconductor memory device, particularly to a nonvolatile RAM (random access memory) capable of saving cell data even when an electric power supply is cut off.
2. Description of the Related Art
A DRAM (Dynamic RAM) is one kind of a semiconductor memory devices. Although the DRAM offers advantages of a large capacity, low cost and high-speed accessibility, one drawback has been that the cell data, which have been stored, are lost when the electric power supply is cut off.
For this reason, various nonvolatile RAMs have been proposed that have volatile memories and nonvolatile memories in combination. For example, JP 2001-5723 (hereinbelow, referred to as Patent Document 1) has proposed a multichip module in which a volatile memory such as a DRAM and a nonvolatile memory represented by a flash memory are mounted in a single package; a multichip package (MCP) in which the chips of volatile memories and the chips of nonvolatile memories are stacked one over another; and a hybrid-mounted chip in which both volatile memory and nonvolatile memory are mounted on the same chip. In the multichip module, MCP, and the hybrid-mounted chip, at the time when the power-supply potential rises (when the power supply is switched on), the data that have been stored in flash memory are transferred to the DRAM, and at the time when the power-supply potential falls (when the power supply is switched off), the data that have been written in the DRAM are transferred to the flash memory.
In addition to the above-described memory devices, the so-called FeRAM, in which nonvolatile material is employed in the capacitor of a memory cell, has long been proposed as a nonvolatile element. FeRAM is regarded as a promising memory device for mobile products having power-consumption-dependent performances, particularly for recent portable devices that require a large memory capacity for higher performance.
The above-described conventional nonvolatile RAMs, however, are problematic as described below.
In a multichip module and an MCP, need for a plurality of chips, employing special package structures, and necessitating specific software support and the like on the apparatus side that employs the memory device of interest, have entailed high costs and led to inferior versatility. Consequently, this has meant economic problems because cost reduction which result from mass production cannot be expected.
In a hybrid-mounted chip, mounting a flash memory and a DRAM on the same silicon substrate allows for the realization of low cost. However, since this memory device requires transfer of data stored in the DRAM to the flash memory in bit units, one drawback has been that the data transfer requires extra time. In order to remedy this drawback, it is necessary to provide, on the chip, a number of lead wires for I/O wiring to transfer data at the same time, entailing an enlargement of the size of the hybrid-mounted chip which will mean a cost disadvantage. But reducing the cost by reducing the number of wires will limit the amount of data that can be transferred. Thus, the hybrid-mounted chip at present has little practicability and has not been extensively employed yet.
Concerning FeRAM at present, since there are many problems to be solved, such as the stability of the material to be employed, the realization of large storage capacity has been delayed, and further, since FeRAM lacks continuity from existing technologies, mass production of FeRAM has not been attained. Thus, FeRAM has difficulties in material technology and size-reduction.